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| UFC718AE101 HIEE300936R0101 |
7.3 Feature Description 7.3.1 Overvoltage Protection The LM3481 has overvoltage protection (OVP) for the output voltage. OVP is sensed at the feedback pin (FB). If at anytime the voltage at the feedback pin rises to VFB + VOVP, OVP is triggered. See the Electrical Characteristics section for limits on VFB and VOVP. OVP will cause the drive pin (DR) to go low, forcing the power MOSFET off. With the MOSFET off, the output voltage will drop. The LM3481 will begin switching again when the feedback voltage reaches VFB + (VOVP - VOVP(HYS)). See the Electrical Characteristics section for limits on VOVP(HYS). The Error Amplifier is operationnal during OVP events. 7.3.2 Bias Voltage The internal bias of the LM3481 comes from either the internal bias voltage generator as shown in the block diagram or directly from the voltage at the VIN pin. At input voltages lower than 6 V the internal IC bias is the input voltage and at voltages above 6 V the internal bias voltage generator of the LM3481 provides the bias. The voltage for the gate driver is output on the VCC pin for compensation by an external capacitor (0.47µF to 4.7µF depending on the FET requirements). Biasing the VCC pin by an external voltage source should not be attempted. + _ PWM Comparator Control Signal -M2 DTS (1-D)TS M1 MC = 0 Steady State Signal Vsamp Perturbed Signal 'Vsamp1 'Vsamp0 0.5, ΔVsamp1 will be greater than ΔVsamp0. In other words, the disturbance is divergent. So a very small perturbation in the load will cause the disturbance to increase. To ensure that the perturbed signal converges we must maintain:
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