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KUC321AE HIEE300698R0001 ABB Excitation control module in stock
KUC321AE HIEE300698R0001 ABB Excitation control module in stock
Our Email: 2235954483@qq.com
contact number:13313705507
contacts：HE
Overvoltage protection based on conventional voltage
measurement
Both the low-set and the high-set overvoltage stage can independently be set to start
and trip when one of the three voltages or all the voltages rise above the set start
value. By default, both stages operate when one of the three voltages rise above the
set start value. The selection is made in SGF4/5 and SGF4/6.
When the phase-to-phase voltage values exceed the set start value of the low-set
stage, U>, the stage generates a start signal after a ~ 60 ms’ start time. When the set
operate time at definite-time characteristic or the calculated operate time at IDMT
characteristic elapses, the stage generates a trip signal.
Stage U> has a settable resetting time (both at definite-time and IDMT
characteristics), tr>, for reset coordination with existing electromechanical relays or
for reducing fault clearance times of recurring, transient faults. If stage U> has
started and the phase-to-phase voltages fall below the set start value of the stage, the
start of the stage remains active for the set resetting time. If the phase-to-phase
voltages exceed the set start value again while the timer is running, the timer is
cleared and the start of the stage remains active.
Consequently, the set resetting time ensures that when the stage starts because of
voltage spikes, it is not immediately reset. If stage U> has already tripped, the stage
is reset in 70 ms after the phase-to-phase voltages have fallen below 0.5 times the set
start value of the stage. However, if stage U> has already tripped and the phase-tophase voltages have fallen below the set start value of the stage, but not below 0.5
times the set start value, the stage is reset when the set resetting time is expired.
When the conventional protection mode is selected and the phase-to-phase voltages
exceed the set start value of the high-set stage, U>>, the stage generates a start
signal after a ~ 50 ms’ start time. When the set operate time at definite-time
characteristic or the calculated operate time at IDMT characteristic elapses, the stage
generates a trip signal. The stage is reset in 70 ms after the phase-to-phase voltages
have fallen below the set start value of the stage.
The conventional overvoltage stages have a settable drop-off/pick-up ratio, which is
adjustable between 0.95...0.99, the default being 0.97.
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