Price Advantage of Xc7z007s-1clg400i Cspbga-400 Single Chip Microcomputer

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Zynq-7000 series provides the flexibility and scalability of FPGA, as well as the performance, powerful performance and ease of use usually associated with ASIC and ASSPS. The device family of the zynq-7000 series allows designers to target cost sensitive and high-performance applications from a single platform using industry standard tools. Although each device in the zynq-7000 series contains the same PS, PL and I / O resources vary from device to device. Therefore, zynq-7000 and zynq-7000ssocs can serve a wide range of applications, including:

• car driver assistance, driver information and infotainment

• broadcast camera

• industrial motor control, industrial networks and machine vision

• IP and smart cameras

• LTE radio and baseband

• medical diagnosis and imaging

• multifunction printer

• video and night vision equipment

Zynq-7000 architecture can realize custom logic in PL and custom software in PS. It allows the realization of unique and differentiated system functions. The integration of PS and PL allows performance levels that cannot be matched by dual chip solutions (e.g., ASSP with FPGA) because of their limited I / O bandwidth, latency and power budget. 

Xilinx provides a large number of soft IP for zynq-7000 family. Peripherals in PS and PL can provide independent and Linux device drivers. Vivado ® The design suite development environment can provide rapid product development for software, hardware and system engineers. The adoption of arm based PS also brings a wide range of third-party tools and IP providers, combined with Xilinx's existing PL ecosystem.

Includes application processor support and advanced operating system support, such as Linux. Other standard operating systems used with the cortex-a9 processor can also be used in the zynq-7000 series.

PS and PL are in separate power domain, so that users of these devices can turn off PL for power management when needed. The processor in PS is always started first, which allows the software centered PL configuration method. PL configuration is managed by software running on the CPU, so its startup mode is similar to ASSP.