GE IC697CHS770 Dual-redundant Rear-mounted Rack Module

The system includes two identical CPU modules (such as IC697CGR772 or IC697CGR935), installed in the main and standby racks respectively.

Each CPU runs the same control program independently and exchanges data in real-time through a dedicated synchronous bus (VME bus) to ensure consistent status.

The IC697CHS770 provides a dual redundant backplane, with each backplane connecting the main and standby CPUs and all I/O modules.

The backplane adopts differential signal transmission, featuring strong anti-interference capability and supporting high-speed data synchronization (approximately 40MB/s).

The system is equipped with two independent power modules, supplying power to the main and standby CPUs and I/O modules respectively.

The power modules support hot swapping, so when one power supply fails, the other can bear the full load.

All I/O modules are connected to both the main and standby backplane buses simultaneously.

The CPU communicates with I/O modules through redundant communication protocols (such as SNP protocol) to ensure data consistency.

Key data is mirrored in real-time between the main and standby CPUs through the synchronous bus, including:

The synchronization cycle is usually less than 1ms to ensure no data loss during switching.

The main and standby CPUs continuously exchange "heartbeat" signals to monitor each other's status.

If the main CPU does not send a heartbeat within the specified time (usually <10ms), the standby CPU automatically determines that the main CPU has failed and triggers a switch.

During switching, the standby CPU immediately takes over control and keeps the current output state unchanged.

The program counter (PC) resumes from the fault point to ensure the continuous execution of the control logic.

All I/O modules automatically switch to the communication path of the standby CPU without re-initialization.

The main CPU detects faults through self-inspection (such as memory errors, communication interruptions);

The standby CPU detects the failure of the main CPU through the loss of heartbeat signals;

I/O modules detect communication abnormalities through the redundant bus and report them.

When a fault is detected, the standby CPU completes the following operations within <10ms:

The system can replace the faulty CPU module online (supporting hot swapping);

The new CPU automatically synchronizes data from the standby CPU and enters the hot standby state;

The switching process requires no manual intervention and does not affect system operation.

The Mean Time Between Failures (MTBF) is significantly improved, making it suitable for critical systems that operate continuously (such as power, chemical industry).

The switching time is <10ms, which is negligible and has no impact on actuators (such as valves, motors).

Supports online replacement of faulty modules without shutdown;

Fault diagnosis information (such as fault codes, timestamps) is stored in the standby CPU for easy tracing.

Compatible with all I/O modules of the GE Fanuc 90-70 series;

Supports multiple communication protocols (such as DH+, Ethernet/IP) and can be seamlessly integrated into existing systems.

Power systems: Generator set control, substation automation, requiring 7×24 hours of uninterrupted operation;

Chemical processes: Temperature and pressure control of reaction kettles, avoiding safety accidents caused by faults;

Rail transit: Signal systems, automatic train operation (ATO), ensuring driving safety;

Metallurgical production lines: Control of continuous casting and rolling processes to prevent billet quality problems.

Power redundancy: Use dual power modules (such as IC697PWR710) and connect them to different power grids.

Communication redundancy: The main and standby CPUs are connected to the upper computer through independent network interfaces to avoid single-point communication failures.

Regular testing: Simulate CPU faults through software to verify the normal operation of the switching function.

Firmware upgrade: Keep the firmware versions of the main and standby CPUs consistent to avoid synchronization abnormalities.