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Help CenterDAC8426AR/883C Quad 8-Bit Voltage Out CMOS DAC Complete With Internal 10V Reference
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DAC8426AR/883C Quad 8-Bit Voltage Out CMOS DAC Complete with Internal 10V Reference
The DAC-8426 is a complete quad voltage output D/A converter with internal reference. This product fits directly into any existing 7226 socket where the user currently has a 10 V external reference. The external reference is no longer necessary. The internal reference of the DAC-8426 is laser-trimmed to ±0.4% offering a 25ppm/°C temperature coefficient and 5mA of external load driving capability.
The DAC-8426 contains four 8-bit voltage-output CMOS D/A converters on a single chip. A 10 V output bandgap reference sets the latches and interface control logic.
One of the four latches, selected by the address inputs, is loaded from the 8-bit data bus input when the write strobe is active low. All digital inputs are TTL/CMOS (5V) compatible. The on-board amplifiers can drive up to 10mA from either a single or dual supply. The on-board reference that is always connected to the internal DACs has 5mA available to drive external devices.
Its compact size, low power, and economical cost-per-channel, make the DAC-8426 attractive for applications requiring multiple D/A converters without sacrificing circuit-board space. System reliability is also increased due to reduced parts count.
Analog Devices' advanced oxide-based, silicon-gate, CMOS process allows the DAC-8426's analog and digital circuitry to be manufactured on the same chip. This, coupled with Analog Devices' highly stable thin-film R-2R resistor ladder, aids in matching and temperature tracking between DACs.
DAC8426AR/883C
No Adjustments Required, Total Error ±1 LSB Max Over Temperature
Four Voltage-Output DACs on a Single Chip
Internal 10 V Bandgap Reference
Operates from a Single +15 V Supply
Fast 50 ns Data Load Time, All Temperatures
Pin-for-Pin Replacement for PM-7226 and AD7226 Eliminates External Reference
ADC08DJ3200AAV 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (ADC)ADC08DJ3200AAV Description
The ADC08DJ3200 device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that can directly sample input frequencies from DC to above 10 GHz. In dual-channel mode, the ADC08DJ3200 can sample up to 3200 MSPS and up to 6400 MSPS in single-channel mode. Programmable tradeoffs in channel count (dual-channel mode) and Nyquist bandwidth (single-channel mode) allow development of flexible hardware that meets the needs of both high channel count or wide instantaneous signal bandwidth applications. Full-power input bandwidth (–3 dB) of 8.0 GHz, with usable frequencies exceeding the –3-dB point in both dual- and single-channel modes, allows direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.
The ADC08DJ3200 uses a high-speed JESD204B output interface with up to 16 serialized lanes and subclass-1 compliance for deterministic latency and multi-device synchronization. The serial output lanes support up to 12.8 Gbps and can be configured to trade-off bit rate and number of lanes. At 5 GSPS, only four total lanes are required running at 12.5 Gbps or 16 lanes can be used to reduce the lane rate to 3.125 Gbps. Innovative synchronization features, including noiseless aperture delay (TAD) adjustment and SYSREF windowing, simplify system design for phased array radar and MIMO communications.
ADC08DJ3200AAV Features
ADC Core:
8-Bit Resolution
Up to 6.4 GSPS in Single-Channel Mode
Up to 3.2 GSPS in Dual-Channel Mode
Performance Specifications (fIN = 997 MHz):
Dual-Channel Mode: 67 dBFS
Single-Channel Mode: 62 dBFS
ENOB: 7.8 Bits
SFDR:
Buffered Analog Inputs With VCMI of 0 V:
Analog Input Bandwidth (–3 dB): 8.0 GHz
Usable Input Frequency Range: >10 GHz
Full-Scale Input Voltage (VFS, Default): 0.8 VPP
Analog Input Common-Mode (VICM): 0 V
Noiseless Aperture Delay (TAD) Adjustment:
Precise Sampling Control: 19-fs Step
Simplifies Synchronization and Interleaving
Temperature and Voltage Invariant Delays
Easy-to-Use Synchronization Features:
Automatic SYSREF Timing Calibration
Timestamp for Sample Marking
JESD204B Serial Data Interface:
Supports Subclass 0 and 1
Maximum Lane Rate: 12.8 Gbps
Up to 16 Lanes Allows Reduced Lane Rate
Power Consumption: 2.8 W
Power Supplies: 1.1 V, 1.9 V
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