10G XFP SR 850nm Multi-rate XFP Optical Transceivers
Specifications
1.850nm sfp optical transceiver2.Hot pluggable
3. +3.3V single power supply
4. 850nm VCSEL laser
10G XFP SR 850nm Multi-rate XFP Optical Transceivers
Product Features
1. Hot pluggable
2. Support 9.95Gb/s to 11.1Gb/s bit rates
3.Below 2.5W power dissipation
4.XFP MSA package with duplex LC connector
5.Digital Diagnostic Monitor Interface
6.Very low EMI and excellent ESD protection
7.Un-cooled 850nm VCSEL laser
8. +3.3V single power supply
9.operating temperature range 0°C to 70°C
10.No reference clock requirement
Applications
1.10G BASE-ER/EW Ethernet
2.SONET OC-192/SDH STM-64
3. Other optical links
Description
10G 850nm XFP transceivers are designed for 10G Ethernet 10G BASE-ER/EW per 802.3ae and 10G SONET OC-192/SDH STM-64, and it can support data-rate from 9.953Gb/s to 11.1Gb/s.Digital diagnostics are available via I2C interface as specified in the XFP MSA.
The transceiver designs are optimized for high performance and cost effective to supply customers the best solutions for datacom and telecom applications.
Functional Diagram
Pin Definitions
1. Module ground pins GND are isolated from the module case and chassis ground within the module.
2. Open collector; Shall be pulled up with 4.7K-10Kohms to a voltage between 3.15V and 3.6V on the host board.
3. The pins are open within module.
4. Reference Clock is not required
Absolute Maximum Ratings
Electrical Characteristics(TOP=0to70°C)
Optical Characteristics(TOP=0 to 70°C,VCC3=3.13 to3.47 Volts)
Management Interface
XFP 2-wire serial interface is specified in the Chapter 4 of the XFP MSA specification. The XFP 2-wire serial interface is used for serial ID, digital diagnostics, and certain control functions. The 2-wire serial interface is mandatory for all XFP modules. The 2-wire serial interface address of the XFP module is 1010000X(A0h). In order to access to multiple modules on the same 2-wire serial bus, the XFP has a MOD_DESEL(module deselect pin). This pin (which is pull high or deselected in the module) must be held low by the host to select of interest and allow communication over 2-wire serial interface. The module must not respond to or accept 2-wire serial bus instructions unless it is selected.
XFP Management Interface
XFP Management interface is specified in the Chapter 5 of the XFP MSA specification. The Figure 1 shows the structure of the memory map. The normal 256 Byte address space is divided into lower and upper blocks of 128 Bytes. The lower block of 128 Byte is always directly available and is used for the diagnostics and control functions that must be accessed repeatedly. Multiple blocks of memories are available in the upper 128 Bytes of the address space. These are individually addressed through a table select Byte which the user enters into a location in the lower address space. The upper address space tables are used for less frequently accessed functions and control space for future standards definition.
Serial ID Memory Contents(table 01h)
Typical Interface Circuit
Package Dimension

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