THC63LVDM83R REDUCED SWING LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE THine

THC63LVDM83R/THC63LVDM63R

REDUCED SWING LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE

General Description

The THC63LVDM83R transmitter converts 28bits of

CMOS/TTL data into LVDS (Low Voltage Differential

Signaling) data stream. A phase-locked transmit clock

is transmitted in parallel with the data streams over a

fifth LVDS link. At a transmit clock frequency of

85MHz, 28bits of RGB data and 4bits of LCD timing

and control data (HSYNC, VSYNC, CNTL1, CNTL2)

are transmitted at a rate of 595Mbps per LVDS channel.

Also available is THC63LVDM63R that converts 21bits

of CMOS/TTL data into LVDS(Low Voltage Differential Signaling) data stream. Both transmitters can be

programmed reduced swing LVDS through a dedicated

pin for low power consumption and EMI.

Features

• 28:4 Data channel compression at up to 

298 Megabytes per sec throughput

• Wide dot clock range: 20-85MHz suited for VGA, 

SVGA, XGA and SXGA

• Narrow bus (10 lines or 8 lines) reduces cable size

• Support Reduced swing LVDS for Low EMI

• 200mV swing LVDS/350mV swing LVDS 

selectable

• Support Spread Spectrum Clock Generator

• On chip Input Jitter Filtering

• PLL requires No external components

• Single 3.3V supply with 125mW(TYP)

• Power-Down Mode

• Low profile 56 or 48 Lead TSSOP Package

• Clock Edge Programmable

• Improved Replacement for the National DS90C383 

or DS90C363