Invensys Triconex MP3101 TMR Main Processor

Sumset International Trading Co., Limited

Parent company: Xiamen Hongxinhe Trading Co., Ltd. 

Lina(Sales Manager/Technical Consultant)

Mobile (WhatsApp/Wechat): +86 18059276824

Email: sales7@nseauto.com

Address: Room 1904, Building B, Diamond Coast, No. 96 Lujiang Road, Siming District, Xiamen, Fujian, China 361001

Model 3008 Main Processors are available for Tricon v9.6 and later systems. For detailed specifications, see the Planning and Installation Guide for Tricon Systems.

Three MPs must be installed in the main chassis of every Tricon system. Each MP independently communicates with its I/O subsystem and executes the user-written control program.

Sequence of Events (SOE) and Time Synchronization

During each scan, the MPs inspect designated discrete variables for state changes known as events. When an event occurs, the MPs save the current variable state and time stamp in the buffer of an SOE block.

If multiple Tricon systems are connected by means of NCMs, the time synchronization capability ensures a consistent time base for effective SOE time-stamping. See page 70 for more information.

Diagnostics

Extensive diagnostics validate the health of each MP, I/O module and communication channel. Transient faults are recorded and masked by the hardware majority-voting circuit.

Persistent faults are diagnosed and the errant module is hot-replaced. MP diagnostics perform these tasks:

• Verify fixed-program memory and static RAM